一仰坦、STD_LOGIC_VECTOR 轉 INTEGER
先將STD_LOGIC_VECTOR根據(jù)需求使用signed()轉為 SIGNED 或者 使用 unsigned() 轉為 UNSIGNED （signed() 和 unsigned() 在 numeric_std 中）蘸嘶，
然后使用?conv_integer() 或者 to_integer() 轉為整數(shù)良瞧。
conv_integer() 和 to_integer()?二者分別在不同的Library中。
Function "conv_integer" defined in Synopsys Library : std_logic_arith, defined as:
USE IEEE.STD_LOGIC_ARITH.ALL;
function CONV_INTEGER(ARG: UNSIGNED) return INTEGER;
function CONV_INTEGER(ARG: SIGNED) return INTEGER;?
Function "To_integer" defined in IEEE library: numeric_std, defined as:
USE IEEE.NUMERIC_STD.ALL;
function TO_INTEGER (ARG: UNSIGNED) return INTEGER;
function TO_INTEGER (ARG: SIGNED) return INTEGER;
例:
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.numeric_std.ALL;
entity conv_test is
Port ( a : in STD_LOGIC_VECTOR (7 downto 0);
? ? ? ? ? ? b : out integer);
end conv_test;
architecture Behavioral of conv_test is
begin
b <= to_integer(signed(a));
end Behavioral;
https://www.xilinx.com/support/answers/45213.html
一训唱、INTEGER 轉 STD_LOGIC_VECTOR
先將INTEGER根據(jù)需求使用 to_signed(interger,signed'length) 轉為 SIGNED 或者使用 to_unsigned(integer,unsigned'length) 轉為UNSIGNED褥蚯，
然后使用STD_LOGIC_VECTOR(signed/unsigned)轉為整數(shù)。
例:
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.numeric_std.ALL;
signal input_1?? : integer;
signal output_1a : std_logic_vector(3 downto 0);
signal output_1b : std_logic_vector(3 downto 0);
-- This line demonstrates how to convert positive integers
output_1a <= std_logic_vector(to_unsigned(input_1, output_1a'length));
-- This line demonstrates how to convert positive or negative integers
output_1b <= std_logic_vector(to_signed(input_1, output_1b'length));
https://www.nandland.com/vhdl/examples/example-signed-unsigned.html
