#Please run verify_pg_nets -std_cell_pin_connection ignore -macro_pin_connection all -pad_pin_connection ignore firstly
#Use the following command to capture all the bbox where the corresponding floating pin-shape happens.
##Users need to change the power.err for {CELL_NAME}.err
##Users can modify the Gnd-1-Pin to the other typr if needed.
set where_drc_error_happens [get_attribute -class drc_error [get_drc_errors -type {Pwr-1-Pin} -error_view sa_xsw.err] bbox]
#set where_drc_error_happens [get_attribute -class drc_error [get_drc_errors -type {Gnd-1-Pin} -error_view sa_xsw.err] bbox]
foreach origin_bbox $where_drc_error_happens {
##The origin bbox is not recongnized as a bbox list, so need to convert to a list form.
##And enlarge the origin pin shape bbox by 0.05 on all four sides for change_selection within a region later (Line 16)
if {[regexp {\{\{(\S+)\s+(\S+)\}\s+\{(\S+)\s+(\S+)\}\}} $origin_bbox match xx0 yy0 xx1 yy1]} {
set x0 [expr $xx0 - 0.05]
set y0 [expr $yy0 - 0.05]
set x1 [expr $xx1 + 0.05]
set y1 [expr $yy1 + 0.05]
}
set bbox [list [list $x0 $y0] [list $x1 $y1]]
change_selection [get_pin_shape * -within $bbox ]
set cel [get_attribute [get_cells -of [get_selection]] full_name]
set orientation [get_attribute [get_cells $cel] orientation]
set cel_bbox [get_attribute [get_cells $cel] bbox]
set cel_y0 [expr [lindex [lindex $cel_bbox 0] 1] - 0.05]
set cel_y1 [expr [lindex [lindex $cel_bbox 1] 1] + 0.05]
set pin_shape [get_pin_shape [get_selection]]
set bbox [get_attribute $pin_shape bbox]
set layer [get_attribute $pin_shape layer]
#Do not forget the -all which will cause Error when meet VDD/VSS
set net [get_flat_net -of [get_pin -of [get_pin_shape $pin_shape] -all] -all]
set x0 [lindex [lindex $bbox 0] 0]
set y0 [lindex [lindex $bbox 0] 1]
set x1 [lindex [lindex $bbox 1] 0]
set y1 [lindex [lindex $bbox 1] 1]
set pin_length [expr $x1 - $x0]
set width [expr $y1 - $y0]
#All the drc errors are the same , only need to strap the pin shape 3.82 towards the right direction. So the length is 3.82
## modify by jasons 2016/08/15
if {$orientation == "S" || $orientation == "FN"} {
set s_x0 [expr $x0 - 2.86]
set s_x1 $x1
set s_bbox [list [list $s_x0 $cel_y0] [list $s_x1 $cel_y1]]
set ss_x0 [get_attribute [get_net_shapes -of $net -within $s_bbox -filter "length > $pin_length"] bbox_llx]
set ss_x1 [get_attribute [get_net_shapes -of $net -within $s_bbox -filter "length > $pin_length"] bbox_urx]
set length_1 [expr $x0 - $ss_x0]
set origin_x $ss_x0
set origin_y [expr ($y0 + $y1) * 0.5]
set origin [list $origin_x $origin_y]
set via_x0 [expr $ss_x0 -0.05]
set via_y0 [expr $y0 - 0.05]
set via_x1 [expr $ss_x1 + 0.05]
set via_y1 [expr $y1 + 0.05]
} elseif {$orientation == "N" || $orientation == "FS"} {
set s_x0 $x1
set s_x1 [expr $x1 + 2.86]
set s_bbox [list [list $s_x0 $cel_y0] [list $s_x1 $cel_y1]]
set ss_x1 [get_attribute [get_net_shapes -of $net -within $s_bbox -filter "length > $pin_length"] bbox_urx]
set ss_x0 [get_attribute [get_net_shapes -of $net -within $s_bbox -filter "length > $pin_length"] bbox_llx]
set length_1 [expr $ss_x1 - $x1]
set origin_x $x1
set origin_y [expr ($y0 + $y1) * 0.5]
set origin [list $origin_x $origin_y]
set via_x0 [expr $ss_x0 - 0.05]
set via_y0 [expr $y0 - 0.05]
set via_x1 [expr $ss_x1 + 0.05]
set via_y1 [expr $y1 + 0.05]
}
create_net_shape -no_snap -type wire -net $net -layer $layer -datatype 0 -path_type 0 -width $width -route_type user_enter -length $length_1 -origin $origin
###sally add on 2014/09/11 to specify via type and disable drc check when create vias#########
set_preroute_advanced_via_rule -move_via_to_center -x_offset 0.0 -y_offset 0.0 \
-x_step 0.0 -y_step 0.0 -contact_code VIA45_FBD20 \
-rotation_mode off
set_preroute_drc_strategy -ignore_metal_blockage_layer -ignore_via_blockage_layer -no_design_rule -min_layer M1 -max_layer AP
set via_bbox [list [list $via_x0 $via_y0] [list $via_x1 $via_y1]]
create_preroute_vias -from_layer $layer -from_object_strap -from_object_std_pin_connection -from_object_macro_io_pin -from_object_ring -from_object_user -from_object_std_pin -from_object_macro_io_pin_connection -from_object_bus -to_layer M5 -to_object_strap -to_object_std_pin_connection -to_object_macro_io_pin -to_object_ring -to_object_user -to_object_std_pin -to_object_macro_io_pin_connection -to_object_bus -within $via_bbox -advanced_via_rules
}
###sally add -advanced_via_rules to use specified vias on 2014/09/11#######
#set origin_bbox {{{1956.590 3519.700} {1958.540 3519.820}}}
#check if fixed
verify_pg_nets -std_cell_pin_connection ignore -macro_pin_connection all -pad_pin_connection ignore > ./reports/verify_pg_after_power_fix.rpt
save_mw_cel -as power_fix
Create via on thin p/g pin (ICC)
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